1. Field of the Invention
The present invention relates generally to shallow trench isolation structures, and more particularly, to shallow trench isolation structures which can reduce the depletion of silicon substrates caused by the flowable chemical vapor deposition (FCVD) process.
2. Description of the Prior Art
One of the persistent challenges faced in the development of semiconductor technology is the desire to increase the density of circuit elements and interconnections on substrates without introducing unwanted interactions between them. Unwanted interactions are typically prevented by providing gaps or trenches that are filled with electrically insulating material to isolate the elements both physically and electrically. Shallow trench isolations (STI) are one of the isolating structures widely adopted in integrated circuits (IC) to provide electrical isolation between adjacent semiconductor devices formed in a substrate. In the application of a CMOS IC, STIs are typically formed between like kinds of NMOS or PMOS transistors in a given well or substrate to suppress the leakage current between neighboring devices and to prevent CMOS latch-up from happening, which typically causes device failure. STIs may also be used in the manufacture of fin field effect transistor (FinFET) device to isolate fin structures.
As circuit densities increase, however, the widths of these gaps or trenches decrease, thereby increasing their aspect ratios and making the gaps progressively more difficult to be filled without leaving voids. The formation of voids when the gap is not filled completely is undesirable because they may adversely affect the operation of the completed device, such as by trapping impurities within the insulating material. Accordingly, as the trend in the semiconductor industry keeps going towards more densely packed devices, it will be desirable to find new methods of depositing dielectric materials into the trends with increasing the aspect ratios and to develop novel STI structures.